Products such as semiconductor devices and liquid crystal displays are manufactured by performing a series of various types of processing on the aforementioned substrates, such as cleaning, resist coating, exposure, development, etching, formation of an interlayer insulation film, heat treatment, and dicing. Substrate processing apparatuses that perform, among the various types of processing, resist coating processing on substrates and transfer the substrates to an exposure unit, and then perform development processing on the substrates received from the exposure unit after the exposure processing are widely used as so-called “coaters and developers.”
Coaters and developers that support exposure units using excimer lasers such as argon fluoride (ArF) or krypton fluoride (KrF) lasers are absolutely required to form a chemically amplified resist film on substrates before transferring the substrates to an exposure unit and perform post-exposure baking processing on the substrates that have undergone exposure. The coaters and developers then form a pattern on the resist film by developing a developer to the substrates that have undergone the post-exposure baking processing and performing development processing on the substrates. At this time, a phenomenon (line width roughness: LWR) in which the line width of the resist pattern that has undergone development is roughened may occur due to slight variations in light intensity at the time of exposure or unevenness of the resist material. In view of this, Patent Literature 1 discloses a technique for selectively heating a surface region of a resist film for reflowing by irradiating a resist pattern that has undergone development with ultraviolet light having a short wavelength of 200 nm or less that can be easily absorbed by the resist material.
Furthermore, development of transistors having gate stacked structures, which are a combination of a high-dielectric-constant gate insulation film (High-k gate insulation film) and a metal gate, has been advancing in recent years for the purpose of considerably reducing leakage current. The gate-first process and the gate-last process are known as methods for manufacturing these transistors. The gate-first process is a process of first forming a gate insulation film and a gate electrode and then forming a source and a drain. This gate-first process is the commonest conventional method for manufacturing transistors.
However, defects are more likely to occur in the high-dielectric-constant gate insulation film when the gate-first process is applied to a transistor including the high-dielectric-constant gate insulation film, because relatively high-temperature heat treatment for forming the source and the drain is performed after the formation of the high-dielectric-constant gate insulation film and the metal gate. Accordingly, consideration is being given to adopting the gate-last process in which the gate insulation film and the gate electrode are formed at the end of the process after the source and the drain are formed.
In the gate-last process, a dummy gate such as polysilicon (polycrystalline silicon) is first formed to form the source and the drain and is then removed (see, for example, Patent Literature 2). Then, a metal gate is formed by embedding a metal material in a groove portion that is generated by the removal of the dummy gate.
The gate-last process has a larger number of processing steps than the gate-first process, but has the merit of suppressing the occurrence of defects in the high-dielectric-constant gate insulation film because high-temperature heat treatment is not performed after the formation of the high-dielectric-constant gate insulation film and the metal gate.